Senior Verification Engineer

Employer · Quantum Machines

Electronics engineerSoftware testerFull-time

Budapest

Quantum Machines is a global leader in control systems for quantum computing, a field on the verge of exponential growth. Our innovative hardware and software mark a groundbreaking approach in quantum computer control, scaling from individual qubits to expansive arrays of thousands. We are looking for a Verification Engineer who embodies ambition and positivity, who can passionately take ownership of their responsibilities, collaborating effectively with remote teams to not only meet but exceed our objectives and fulfil the evolving needs of our expanding customer base.

Tasks

  • Practicing the full range of verification aspects
  • Creating a verification environment from scratch (drivers, monitors, coverage...)
  • VIP (DDR/PCIe/AXI) integration
  • Defining verification sequences via a complex control-flow constraint set
  • System understanding of a full-stack product with strong HW-SW coupling
  • Reference model integration
  • Test plan definition
  • Defining verification flows and creating the proper infrastructure to support it

Requirements

  • At least 5 years of experience.
  • Ability to ramp up verification environments from scratch
  • Experience with UVM, System Verilog - Advantage
  • Knowledge of Verification IPs and protocols (PCIe, DDR, AXI)
  • Good understanding of HW/SW interaction- Advantage
  • Knowledge in C/C /Python/System C - Advantage

Posted Nov 3, 2026 · Updated 2 days ago · 0 views